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DATAMATH CALCULATOR MUSEUM |
Additional Pictures
| Clock Input, Digit Output, Segment Output
and Sign Output Pins of the CT5002 during Display
Testing captured with the Digilent Digital Discovery connected to the DCM-50A Platform. CT5002 Clock Frequency at 40 kHz. Note: D.I. Input by mistake not connected to Digilent Digital Discovery Input DIN 20. ![]() |
| Clock Input, Digit Output, Segment Output
and Sign Output Pins of the CT5002 during Calculating
Overflow captured with the Digilent Digital Discovery connected to the DCM-50A Platform. CT5002 Clock Frequency at 40 kHz. Note: D.I. Input by mistake not connected to Digilent Digital Discovery Input DIN 20. ![]() |
| Clock Input, Digit Output, Segment Output
and Sign Output Pins of the CT5002 during Divide
by Zero Loop captured with the Digilent Digital Discovery connected to the DCM-50A Platform. CT5002 Clock Frequency at 40 kHz. Note: D.I. Input by mistake not connected to Digilent Digital Discovery Input DIN 20. ![]() |
| Clock Input, Digit Output, Segment Output
and Sign Output Pins of the CT5002 during Display Inhibit with "-104.679" in the Display Register captured with the Digilent Digital Discovery connected to the DCM-50A Platform. CT5002 Clock Frequency at 40 kHz. Note: D.I. Input by mistake not connected to Digilent Digital Discovery Input DIN 20. ![]() |
If you have additions to the above article please email: joerg@datamath.org.
© Joerg Woerner, June 29, 2026. No reprints without written permission.