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Texas Instruments TI-Nspire CAS+ (Engineering Validations Tests 2)

Date of introduction:  (May 2006) Display technology:  LCD dot matrix
 16-level greyscale
New price:   Display size:  240 * 320 pixels 
Size:  7.9" x 3.9" x 0.85"
 200 x 100 x 22 mm3
   
Weight:  8.8 ounces, 250 grams Serial No:  P1-EVT2-0135
Batteries:  4*AAA Date of manufacture:  mth 04 year 2006
AC-Adapter:   Origin of manufacture:  
Precision:  14 Integrated circuits:  CPU: TI-OMAP NP31AZZG
 SDRAM: HYB18L256160
 Flash: SST 39VF400A, ST NAND256W3A
 Display: Novatek NT7702H, 2*xxx
Memories:      
Program steps:  20M Bytes, 16M Bytes Flash-ROM Courtesy of:  Joerg Woerner 

Texas Instruments filed already October 24, 2003 in Europe a patent application for a stylus based calculator and since the publication of the granted patent EP1424626 in June 2004 there are rumors about a new graphing calculator. The patent itself describes a then novel method of entering data with a stylus into graphing software applications. The sketch of the suggested design of the new calculator reminds us immediately to a failed development project nicknamed PET by the marketing department of Texas Instruments. We discovered in 2007 one of the rare prototypes labeled TI-PLT.

The TI-Nspire CAS+, also known as Phoenix 1, obviously lacks a stylus and seems to trace back to another root than the "PDA-based graphing calculator", a hype started early in this millennium with the Hewlett Packard Xpander. This Windows CE based calculator looked like a PDA with a 240 * 320 pixel gray-scale touch screen,  a small numeric keypad and the stylus. Hewlett Packard canceled the project February 2001 with just a few prototypes left to the disappointed market. Dismantling one of the prototypes revealed a design centered around a Hitachi SH3 RISC-Processor, 8MB of RAM and 16MB of ROM.  

Japanese calculator company Casio was more successful and introduced in 2002 the ClassPad 300 with a 160 * 240 pixel gray-scale touch screen supporting a lot of stylus based operation like drag-and-drop. This design makes use of the Hitachi SH7291 - a SH3 based RISC-Processor, 0.5M Bytes of RAM and 4M Bytes Flash-ROM. 

The ClassPad 300 Plus introduced in 2005 makes use of a much improved display with higher contrast and better readability under low lighting conditions.

TI-NspireCASE_Label.jpg (149849 Byte)This early TI-Nspire CAS+ prototype with the serial number P1-EVT2-0135 was used for Engineering Validation Tests (EVT - learn more about the Five Engineering Stages). At first glance does it look very similar to the final device but we observe some differences with the TI-Nspire CAS introduced in July 2007:

The color scheme is completely different
The cursor control makes use of inner and outer keys
Some function keys have different positions

Please notice that the evaluation of the TI-Nspire Prototypes led to a 2nd generation design with yet another color scheme and keyboard layout. Interesting to learn that these samples were labeled TI-Nspire CAS+ but still sported the "Phoenix" project name on the printed circuit boards (PCB's). Please notice this press release dated May 12, 2006 announcing the New Zealand introduction of the TI-nspire™ CAS+.

Architecture: Dismantling this early TI-Nspire CAS+ prototype reveals an internal design somewhere between the PLT-SHH1 prototype based on the sophisticated POMAP1509E and the ZEVIO architecture of the final TI-Nspire CAS.

TI-NspireCASE_OMAP.jpg (25659 Byte)Processor: The OMAP™ processor of the TI-Nspire CAS+ prototype is labeled TI-OMAP NP31AZZG. We assume that this tiny chip is actually a System-on-Chip based on the OMAP5912 architecture from Texas Instruments hosting a ARM9 32-bit RISC processor clocked at 78 MHz and a TMS320C55xx Digital Signal Processor core. 


TI-NspireCASE_Memory.jpg (129569 Byte)Memory: The TI-Nspire CAS+ prototype makes use of three different memory chips:

NOR Flash-ROM
NAND Flash-ROM
SDRAM

The disassembled TI-Nspire CAS+ prototype (Manufactured April 2006) features one SST 39VF400A NOR Flash-ROM, manufactured by Silicon Storage Technology, Inc. with a 256k*16 organization and one ST NAND256W3A NAND Flash-ROM with 32M Bytes size.

The program and data memory of the disassembled TI-Nspire CAS+ consists of one Qimonda HYB18L256160 SDRAM with 16M*16 size.

Please notice that all three memory chips are almost identical with the parts located in the released TI-Nspire CAS with the April 2007 manufacturing date. The only difference is the supply voltage, it was lowered from 3.3 volts to 1.8 volts.

TI-NspireCASE_LCD.jpg (184001 Byte)Display: The TI-Nspire CAS+ uses a high-contrast display with a resolution of 240 * 320 pixels, a huge improvement over the TI-89 Titanium with 100 * 160 pixels or the Voyage 200 with 128 * 240 pixels. The large 16-level greyscale displays includes a novel split screen capability with up to 4 views.

The driver circuit of the LC-Display is compromised of 2 column driver and one row driver manufactured by Novatek, Taiwan. We located a NT7702H row-driver as bare chip mounted on a flexible piece of circuit board attached between the display and a PCB and two unknown column drivers. 

ROM-Versions:

TI-Nspire CAS+ (Engineering Validation Tests P1-EVT2-0135)

TI-NspireCASE_OS.jpg (87022 Byte)1.0.1.0.334T (May 1, 2006)
Serial Number: 39C21217

You can check the ROM version of your TI-Nspire CAS+ using the following key sequence and reading the number on your screen:

[HOME] [8] [4]

Information provided by Xavier Andréani.

TI-Nspire Computer Link Software for Windows

t.b.d.

TI-Nspire CAS prototypes

Prior to the Nspire CAS's final release, a number of prototype models were developed for evaluation by educational establishments around the world. These units came in numerous color schemes and were all denoted "Nspire CAS+". Some of these prototype CAS+ units were leaked and put up for sale on sites like eBay. As they do not contain final firmware and are not upgradable, TI advises against their purchase.

http://en.wikipedia.org/wiki/TI-Nspire



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If you have additions to the above article please email: joerg@datamath.org.

© Joerg Woerner, October 23, 2007. No reprints without written permission.