Texas Instruments TI-Nspire CAS Touchpad

Date of introduction:  March 8, 2010
 Available: April 2010
Display technology:  LCD dot matrix
 16-level greyscale
New price:  $159.00 (SRP 2010) Display size:  240 * 320 pixels 
Size:  7.8" x 3.9" x 0.85"    
Weight:  9.9 ounces Serial No:  2018005379 
Batteries:  4*AAA Date of manufacture:  mth 02 year 2010 (A)
AC-Adapter:   Origin of manufacture:  China (P)
Precision:  14 Integrated circuits:  CPU: TI-NS2007C (L9B0713)
 SDRAM: MT48H16M16
 Flash: SEC K9F5608
 Display: Novatek NT7702H, 2*xxx
Program steps:  20M Bytes, 16M Bytes Flash-ROM Courtesy of:  Joerg Woerner 

TI-NspireCASTP_BASE.jpg (278544 Byte)Texas Instruments announced on March 8, 2010 the new TI-Nspire CAS Touchpad and TI-Nspire Touchpad graphing calculators. In the United States the new calculator was listed on the TI website as a complement to the TI-Nspire CAS with Clickpad while in some other countries, e.g. Germany, the calculator was introduced as successor to the previous model. The new Operating System 2.0 and some internal labels on the PCBs (printed circuit boards) of the calculator suggest indeed the switch to a "TI-Nspire 2".

The updated TI-Nspire CAS addresses some drawbacks of the original TI-Nspire CAS and the various prototypes of the TI-Nspire CAS+:

Difficult to navigate the screens: Very responsive trackpad vs. 
    the donut shaped keys.
Glutted keyboard: Separate numeric and alpha keys.
Confusing menues: Very intuitive home screen with scratchpad 
    feature in OS 2.0.
Limited programmability: More programming commands in OS 2.0
    for input and output.
High power cosumption: Optional rechargeable battery.

The new Operating System 2.0 is compatible with the original TI-Nspire CAS and available as a free download on Texas Instruments' website. Please notice that the old TI-Nspire CAS calculators can't be upgraded with the new Touchpad, for the previous TI-Nspire w/o CAS a Touchpad is available as an option selling around US$ 10.00. Remember that the first generation of the TI-Nspire and TI-Nspire CAS used a completely different keyboard concept and only the non-CAS device supported the exchangeable "TI-84 Plus Keypad".

TI-NspireCASTP_EXAMPLE1.jpg (198121 Byte)Both the original TI-Nspire CAS (Operating System 1.7 and higher) and the new TI-Nspire Touchpad CAS are compatible with the wireless TI-Nspire Navigator system. The classroom setup uses the TI-Nspire Navigator Wireless Cradle that slides onto each TI-Nspire CAS calculator and communicates with the teacher's computer via the TI-Nspire Navigator Access Point. Up to five wireless cradles can be charged in the TI-Nspire Navigator Cradle Charging Bay.

The TI-Nspire Lab Cradle requires the new Operating System 3.0 (introduced in May 2011) or higher.

TI-NspireCASTP_PCB1.jpg (649143 Byte)TI-NspireCASTP_PCB.jpg (733978 Byte)Architecture: Dismantling the new TI-Nspire CAS manufactured in February 2010 by Inventec (Pudong) Corporation in China reveals some changes compared to the original design of the calculator introduced in 2007. It is still based on the ZEVIO architecture introduced by LSI Logic early in 2006 but uses a different and more complex ASIC! The System-on-Chip (SoC) approach of the ZEVIO is centered around Intellectual Property blocks from ARM (e.g. the 90 MHz ARM9 32-bit RISC processor), LSI Logic's 200-MHz 16-bit ZSP-400 Digital Signal Processor, 16-bit SDRAM memory controller, NAND flash memory controller, USB-2.0 (including USB On the Go), IEEE 1394 Firewire, and Secure Digital I/O and a LCD controller for TFT displays. 

TI-NspireCASTP_SOC.jpg (793072 Byte)Processor: The original design of the TI-Nspire CAS is centered around an impressive chip manufactured by LSI Logic with the markings [L9A0654 / TI-NS2006A-1] while the new chip reads [L9B0713 / TI-NS2007C Magnum]. We assume that the current chip features a higher integration and includes even the NOR Flash-ROM with 256k*16 organization missing on the revised PCBs.   

TI-NspireCASTP_MEMORY.jpg (806511 Byte)Memory: The TI-Nspire CAS makes use of two different memory chips:


Flash memory is non-volatile and does not need a battery to maintain the information stored in the chip. In the past years two different technologies emerged in parallel with some advantages and disadvantages.

The NOR Flash-ROM was invented by Toshiba in 1984 and found its way immediately as a replacement of the more expensive ROM (NRE mask costs) and EEPROM (device costs) memory. The NOR Flash-ROM's use an address and data bus to allow the random access to any memory location. Main disadvantages of the NOR Flash-ROM compared to the NAND Flash-ROM are the higher costs, larger housings and slower write speeds.

The disassembled TI-Nspire CAS (Manufactured February 2010) misses the discrete SST 39WF400A memory chip with 256k*16 organization found in the original design. We assume that this memory was integrated into the new TI-NS2007C Magnum ASIC.

The NAND Flash-ROM architecture was introduced by Toshiba in 1989 and is based on pages of typically 512 to 2048 Bytes and blocks of typical 32 or 64 pages.

While programming is performed on a page basis, erasure can only be performed on a block basis. NAND Flash-ROM's requires bad block management to be performed by device driver software or hardware. Due to the missing address bus the NAND Flash-ROM chip doesn't allow random access to the individual memory positions and therefore it can't be used for program memory of a microprocessor. Typical use of the NAND Flash-ROM memory is file based mass-memory storage such as memory cards.

The disassembled TI-Nspire CAS makes use of one Samsung SEC K9F5608 NAND Flash-ROM with 32M Bytes size compared with the similiar ST NAND256R3A memory of the original design.

SDRAM is the abbreviation of synchronous dynamic random access memory and is used as program and data memory for microprocessor systems. Each bit of data in a SDRAM is stored in separate condensator on the integrated circuit. Since these capacitors leak charge, the information eventually fades unless the capacitor charge is refreshed periodically.

Because of this refresh requirement, it is a dynamic memory as opposed to SRAM and other static memory. Its advantage over SRAM is its structural simplicity: only one transistor and a capacitor are required per bit, compared to six transistors in SRAM. This allows SDRAM to reach very high density at low cost. Since SDRAM loses its data when the power supply is removed, it is accompanied usually by a NOR Flash memory.

During power-up of the system the program content of the NOR Flash-ROM is simply copied into the SDRAM and executed from there. We assume that the TI-Nspire uses the SDRAM as workspace for user data but stores changes on them into the NAND Flash memory.

The disassembled TI-Nspire CAS makes use of one MT48H16M16 SDRAM with 16M*16 size compared with the similiar Qimonda HYB18L256160 memory of the original design.

TI-NspireCASTP_LC1.jpg (400913 Byte)Display: The TI-Nspire CAS uses a high-contrast display with a resolution of 240 * 320 pixels, a huge improvement over the TI-89 Titanium with 100 * 160 pixels or the Voyage 200 with 128 * 240 pixels. The large 16-level greyscale displays includes a novel split screen capability with up to 4 views.

The disassembled TI-Nspire CAS makes use of one Novatek NT7702H driver in a 272 pin Tape Carrier Package for the 240 rows and two unidentified chips for 160 columns, each.


TI-Nspire CAS

TI-NspireCASTP_V2001010_OS.jpg (183465 Byte) (January 2010)  

TI-NspireCASTP_V2001188_OS.jpg (175950 Byte) (March 5, 2010)  
Boot1 Code Version: 1.1.8916
Boot2 Code Version: 1.4.1571 (May 3, 2010) (July 17, 2010) (April 2011) (May 2011)

You can check the ROM version of your TI-Nspire CAS Touchpad using the following key sequence and reading the number on your screen:

[HOME] [5] [4] (2.0 ... 3.0)

Information provided by Xavier Andréani. 

Exam acceptance:

Since the TI-Nspire CAS Touchpad lacks a QWERTY keyboard it is permitted (as of March 10, 2010) for use on SAT, PSAT and AP exams. Calculators with computer algebra system (CAS) functionality are not allowed on ACT exams.


horizontal rule

If you have additions to the above article please email:

© Joerg Woerner, March 9, 2010. No reprints without written permission.