DATAMATH  CALCULATOR  MUSEUM

Texas Instruments Personal Learning Tool PLT VIEW

Date of introduction:  never Display technology:  
New price:    Display size:  n.a.
Size:  4.3" x 4.0" x 1.1"
 108 x 101 x 28 mm³
   
Weight:  3.9 ounces, 112 grams Serial No:  001
Batteries:   Date of manufacture:  year 2003
AC-Adapter:  AC9926 Origin of manufacture:  Taiwan (I)
Precision:   Integrated circuits:  CPU: TI OMAP5910
 SDRAM:
HY57V281620A
 Flash: Toshiba TC58128A, Fujitsu 29LV400TC
Memories:      
Program steps:   Courtesy of:  Texas Instruments

PLT-VIEW_1.jpg (186947 Byte)The Datamath Calculator Museum received this PLT VIEW Presentation Adapter together with some unique graphing calculators as a loan from Texas Instruments in February 2008 to photograph and document it. We learned from Texas Instruments that they developed a family of next-generation Personal Learning Tool products based on the LINUX operating system. The Dallas, TX based team nicknamed it PET Project including three advanced graphing calculators:

PLT SHH1: Spot Hand Held, first generation PET device with smaller, portrait oriented screen.
PLT FHH1: Fido Hand Held, first generation PET device with larger, landscape oriented screen
PLT SU1: Toto Hand Held, second generation PET device with large, color screen.

This PLT VIEW was developed for the PLT SU1 and allows the wireless connection of the Hand Held to a monitor or projector using the IEEE802.11b standard. A small port accommodates the PLT-WC Wireless Card and translates to a standard 15-pin HD D-SUB connector used with VGA and SVGA monitors.

The backside of the module teases us with some interesting information as a start point of further research: Model No: PLT - VIEW, © 2003, Made in Taiwan and a huge OMAP logo.

PLT-VIEW_PCB1.jpg (254439 Byte)PLT-VIEW_PCB.jpg (254214 Byte)Disassembling the PLT VIEW reveals indeed a very complex design centered around the modern architecture based on the OMAP architecture introduced by Texas Instruments already in 2001.  

PLT-VIEW_OMAP.jpg (105099 Byte)Processor: The first-generation OMAP™ 5910 combines in one system the TMS320C55x DSP (Digital Signal Processor) with a ARM925 RISC (Reduced Instruction Set Computing) to perform the perfect balance between performance and power consumption for mobile products. While the OMAP™ 1510 used in the earlier PLT SHH1 and PLT FHH1 was developed for PDAs (Personal Digital Assistants) and smartphones, the OMAP™ 5910 was intended for internet appliances and web pads.  

Memory: The PLT FHH1 makes use of three different memory chips:

NOR Flash-ROM
NAND Flash-ROM
SDRAM

Flash memory is non-volatile and does not need a battery to maintain the information stored in the chip. In the past years two different technologies emerged in parallel with some advantages and disadvantages.

The NOR Flash-ROM was invented by Toshiba in 1984 and found its way immediately as a replacement of the more expensive ROM (NRE mask costs) and EEPROM (device costs) memory. The NOR Flash-ROM's use an address and data bus to allow the random access to any memory location. Main disadvantages of the NOR Flash-ROM compared to the NAND Flash-ROM are the higher costs, larger housings and slower write speeds.

The disassembled PLT VIEW (Manufactured 2003) makes use of one 29LV400TC, manufactured by Fujitsu, Japan with a 256k*16 organization.

The NAND Flash-ROM architecture was introduced by Toshiba in 1989 and is based on pages of typically 512 to 2048 Bytes and blocks of typical 32 or 64 pages.

While programming is performed on a page basis, erasure can only be performed on a block basis. NAND Flash-ROM's requires bad block management to be performed by device driver software or hardware. Due to the missing address bus the NAND Flash-ROM chip doesn't allow random access to the individual memory positions and therefore it can't be used for program memory of a microprocessor. Typical use of the NAND Flash-ROM memory is file based mass-memory storage such as memory cards.

The disassembled PLT VIEW makes use of one Toshiba TC58128A NAND Flash-ROM with 16M Bytes.

SDRAM is the abbreviation of synchronous dynamic random access memory and is used as program and data memory for microprocessor systems. Each bit of data in a SDRAM is stored in separate condensator on the integrated circuit. Since these capacitors leak charge, the information eventually fades unless the capacitor charge is refreshed periodically.

Because of this refresh requirement, it is a dynamic memory as opposed to SRAM and other static memory. Its advantage over SRAM is its structural simplicity: only one transistor and a capacitor are required per bit, compared to six transistors in SRAM. This allows SDRAM to reach very high density at low cost. Since SDRAM loses its data when the power supply is removed, it is accompanied usually by a NOR Flash memory.

During power-up of the system the program content of the NOR Flash is simply copied into the SDRAM and executed from there.

The disassembled PLT VIEW makes use of one Hynix HY57V281620A SDRAM with 8M*16 size.

Connectivity: The PLT VIEW features a huge variety of connectors to the outside world:

Connector for external power supply
Slot for Wireless Card PLT-WC
Connector (15-pin HD D-SUB) for VGA and SVGA monitor  
USB 1.1 connector


horizontal rule

If you have additions to the above article please email: joerg@datamath.org.

© Joerg Woerner, March 6, 2008. No reprints without written permission.