DATAMATH CALCULATOR MUSEUM
Texas Instruments Personal Learning Tool PLT VIEW
|Date of introduction:||never||Display technology:|
|New price:||Display size:||n.a.|
|Size:|| 4.3" x 4.0" x 1.1"
108 x 101 x 28 mm³
|Weight:||3.9 ounces, 112 grams||Serial No:||001|
|Batteries:||Date of manufacture:||year 2003|
|AC-Adapter:||AC9926||Origin of manufacture:||Taiwan (I)|
|Precision:||Integrated circuits:|| CPU: TI OMAP5910
Flash: Toshiba TC58128A, Fujitsu 29LV400TC
|Program steps:||Courtesy of:||Texas Instruments|
SHH1: Spot Hand Held,
first generation PET device with smaller, portrait oriented screen.
This PLT VIEW was developed for the PLT SU1
and allows the wireless connection of the Hand Held to a monitor or projector
using the IEEE802.11b standard. A small port accommodates the PLT-WC Wireless
Card and translates to a standard 15-pin HD D-SUB connector used with VGA and
The backside of the module teases us with
some interesting information as a start point of further research: Model
No: PLT - VIEW, © 2003, Made in
the PLT VIEW reveals indeed a very complex design centered around the modern
architecture based on the OMAP architecture introduced by Texas Instruments
already in 2001. Learn more about the
Hardware Architecture of TI’s Graphing Calculators.
Flash memory is
non-volatile and does not need a battery to maintain the information stored in
the chip. In the past years two different technologies emerged in parallel with
some advantages and disadvantages.
The NOR Flash-ROM was invented by Toshiba in 1984 and found its way immediately as a replacement of the more expensive ROM (NRE mask costs) and EEPROM (device costs) memory. The NOR Flash-ROMs use an address and data bus to allow the random access to any memory location. Main disadvantages of the NOR Flash-ROM compared to the NAND Flash-ROM are the higher costs, larger housings and slower write speeds.
disassembled PLT VIEW (Manufactured 2003) makes use of one 29LV400TC,
manufactured by Fujitsu, Japan with a 256k*16
NAND Flash-ROM architecture was introduced
by Toshiba in 1989 and is based on pages of typically 512 to 2048 Bytes and
blocks of typical 32 or 64 pages.
programming is performed on a page basis, erasure can only be performed on a
block basis. NAND Flash-ROMs requires bad block management to be performed by
device driver software or hardware. Due to the missing address bus the NAND
Flash-ROM chip doesn't allow random access to the individual memory positions
and therefore it can't be used for program memory of a microprocessor. Typical
use of the NAND Flash-ROM memory is file based mass-memory storage such as
disassembled PLT VIEW makes use of one Toshiba TC58128A NAND Flash-ROM with 16M
is the abbreviation of synchronous dynamic random access memory and is used as
program and data memory for microprocessor systems. Each bit of data in a SDRAM
is stored in separate capacitor on the integrated circuit. Since these
capacitors leak charge over time, the information eventually fades unless the capacitor
charge is refreshed periodically.
of this refresh requirement, it is a dynamic memory as opposed to SRAM and other
static memory. Its advantage over SRAM is its structural simplicity: only one
transistor and a capacitor are required per bit, compared to six transistors in
SRAM. This allows SDRAM to reach very high density at low cost. Since SDRAM
loses its data when the power supply is removed, it is accompanied usually by a
power-up of the system the program content of the NOR Flash-ROM is simply copied
into the SDRAM and executed from there.
disassembled PLT VIEW makes use of one Hynix HY57V281620A SDRAM with 8M*16 bits
The PLT VIEW features a huge variety of connectors to the outside world:
for external power supply
If you have additions to the above article please email: firstname.lastname@example.org.
© Joerg Woerner, March 6, 2008. No reprints without written permission.