NEC Calculator Integrated Circuits

NEC (Nippon Electric Company) Corporation of Japan was founded in 1898 and started in 1899 with production, sales, and maintenance of telephones and switches. NEC was one of the forerunners in electronics, starting the research and development of transistors in 1950 and of Integrated Circuits (ICs) in 1960. Its semiconductors business unit was the World's largest semiconductor company by annual revenue from 1985 to 1992. Once Japan's major electronics company, NEC has largely withdrawn from manufacturing since the beginning of the 21^st century.

With the rise of electronic desktop calculators in the 1960s, NEC developed with the uPD1 Series a family of SSI (Small Scale Integration) ICs in p-channel Metal–Oxide Semiconductor (PMOS) technology, consisting of simple inverters, logic gates, flip flops and 4-bit to 16-bit shift registers. The ICs were packaged in 10-pin and 12-pin metal can housings (TO-100 and TO-101, respectively) and operated with a single 24V supply. These kinds of chips, commonly referred as JMOS devices for Japanese MOS, were manufactured around 1968 to 1971 not only by NEC, but with similar or identical functionality, from companies like Hitachi, Mitsubishi and Toshiba, too and provided "logic building block" functionality like the DTL and TTL Logic Families introduced in the Western world.

NEC introduced soon with the uPD100 Series a more complete product portfolio, adding MSI (Medium Scale Integration) complexity like Full Adders or 2x48-bit Shift Registers, while switching to more economical Dual In-line Packages (DIPs) with 14 to 20 pins instead the original metal can packages.

Both the uPD1 and uPD100 Series are manufactured in a 10 um PMOS metal-gate process with enhancement mode transistors used for both gates and loads, a technology used by NEC till around 1974.

First NEC chipset produced for Eiko Business Machine

Early in 1971, Eiko Business Machine, Inc. tasked NEC to design and manufacture a chipset for an 8-digit desktop calculator with printer. The functionality was divided into 5 chips with the calculating algorithm "hard wired" into the logic chip, nicknamed "31" and supported by the data memory chip (32), timing generator (33) and two printer control chips (34, 35). The complexity of the chips approached 1,000 transistors, commonly known as the threshold for LSI (Large Scale Integration) ICs.
These chips are manufactured in a 10 um PMOS metal-gate process with enhancement mode transistors used for both gates and loads and using Dual In-line Packages (DIP) with 28 pins.

Failed NEC single-chip calculator circuit

Driven by the success of the chipset developed for Eiko Business Machines, NEC tasked in 1972 Tokyo Electronic Application Laboratory to develop a single-chip calculator circuit for an 8-digit desktop calculator. During the mask layout of the design it was realized that the chips dimensions would be larger than 5 mm x 5 mm, in 1972 an indicator for a very poor production yield. Dividing the logic into a 2-Chip design didn’t proof realistic due to the sheer amount of electrical interconnects and the limitation to a maximum of 28 pins per package. Consequently was the ambitious project cancelled but triggered the next two big projects within NEC’s growing PMOS product portfolio. Enter µPD271 and µPD281.

First NEC "single-chip" calculator circuit

While NEC relied with their first single-chip calculator circuit on an external design, was the logic design of the µPD271 started from scratch at NEC. The project was launched in March 1972 and the first calculators based on the uPD271 appeared in early 1973 on the market. The µPD271 was designed for portable, battery-operated electronic calculators with 8-digit displays and features leading-zero suppression and a percent function. Here at the Datamath Calculator Museum we don't qualify the µPD271 as a true single-chip calculator circuit, it is using with the µPD261 an external segment decoder and driver chip for the calculator display.
The µPD271 is manufactured in a 10 um PMOS metal-gate process with enhancement mode transistors used for both gates and loads and using Dual In-line Packages (DIP) with 28 pins.

First NEC chipsets for 12-digit calculators

Together with the µPD271 single-chip calculator circuit for 8-digit calculators, NEC started in March 1972 the design of a chipset for 12-digit desktop calculators. The design was divided into five chips, namely µPD281 (Program ROM), µPD282 (Arithmetic Logic Unit and Data Registers), µPD261 (Segment Decoder), µPD262 (Timing Controller), and µPD264 (External Memory Register). The chipset allowed for the design of calculators including a constant function, selectable rounding, fixed-point or floating-point display, accumulating memory, register exchange function, square root and percent function. The µPD280 and µPD283 Program ROMs was exclusively developed and produced for Toshiba.
All chips are manufactured in a 10 um PMOS metal-gate process with enhancement mode transistors used for both gates and loads and using Dual In-line Packages (DIP) with 20 pins (µPD261, µPD262, µPD264), 24 pins (µPD280C, µPD281) and 28 pins (µPD282).

First NEC "true" single-chip calculator circuits

NEC started the development of the µPD940 Series of single-chip calculator circuits in 1973, balancing a combination of increased functionality and yet reduced die size due to an improved manufacturing process compared to the original µPD271 design. The µPD940 integrates a complexity of about 5,500 transistors on a silicon die measuring just 3.80 mm x 3.78 mm, significantly smaller than Texas Instruments’ TMS0800 Series with a die size of around 5.2 mm x 5.1 mm. The feature sets of the two products are very similar, NEC was even able to squeeze the square root function and Pi function in the ROM (Read-Only Memory) of the µPD940 with its capacity of 256 x 19 bits. The shift-register based data memory (SAM, Serial Access Memory) of the µPD940 has a capacity of 144 bits, organized in three 12 Digits Registers of 48 bits, each. The µPD940 was formally introduced in September 1974 and complemented in February 1975 with the µPD946, increasing both the ROM and SAM capacity of the µPD940, and hence allowing the design of 8-digit calculators with Memory Function.
The µPD940 and its derivatives µPD941, µPD942, and µPD943 are manufactured in a 7.5 um PMOS metal-gate process with enhancement mode transistors used for both gates and loads and using Dual In-line Packages (DIP) with 28 pins. The µPD946 and its sibling µPD947 are manufactured in a 7.5 um PMOS metal-gate process with enhancement mode transistors used for gates and depletion mode transistors for loads and using Dual In-line Packages (DIP) with 20 pins.

Work-In-Progress.

NEC Numbering

NEC introduced already with first Integrated Circuits (ICs) a well-organized numbering scheme for their products. The leading µ is a registered trademark used with ICs and the following two letters define the Family Type:

The Family Type is followed by the Product Number, in many cases a sequential number:

Additional fields are reserved for Revision (one character, starting with A) and Functional Classification (one character).

The next field is used for the Package Type (one or two characters):

Additional fields are used for Quality Grade, Custom Codes, Speed Classification, etc.

Note: Some products may have characters such as /JM suffixed to their part numbers. These characters indicate where the product was manufactured. The first character after the slash indicates the country where the manufacturer of the IC diffusion processing is located, and the second character indicates the country where the product was assembled. In the case of /JM, the J stands for Japan, and the M for Malaysia.

A typical single-chip calculator circuit from NEC manufactured in 1975 might read NEC µPD940C H5728M:

         Note: 1 January … 9 September, X October, Y November and Z December

NEC LSI/MOS Process Timeline