DATAMATH CALCULATOR MUSEUM
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DATAMATH CALCULATOR MUSEUM |
NEC introduced in Fall 1973 with the µPD273 their first single-chip calculator circuit with 8-digit display capability and very basic functionality. It was complimented in December 1973 with the µPD277, a design with 8-digit display capability and integrated 2-key Memory. Within a few moths the µPD276 was added to the product offerings with various improvements:
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• 3/4-key Memory and optional Auto-Summation Function • Optional Constant Function for Multiplication, Division, Addition and and Subtraction • Cost-improved Clock Oscillator • Low-voltage Vacuum Fluorescent Displays (VFDs) compatible Keyboard Inputs |
NEC implemented with the µPD276 two different approaches for the use of the Memory. In Auto-Summation Mode every press of the [=] key adds the display result to the value already stored in the Memory while the 3/4-key Memory implements the [M+=] function of the µPD277 but adds a [M−=] function. Additionally allows the µPD276 to implement a calculator keyboard with either a combined [MRC] key or two separate [MR] and [MC] keys.
The Constant Function of the µPD277 is not only expanded to operate on Addition and Subtraction, too but can be disabled completely.
Product Managers at NEC did not stop with the µPD276/µPD277 siblings, they expanded their portfolio of single-chip calculator circuits for 8-digit calculators soon with the µPD940 Series and µPD946 Series. The µPD940 was positioned below the µPD276/µPD277 and lacked the Memory while the µPD946 was positioned above and featured so-called Convenience Functions like square and reciprocal functions:
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• µPD941: [+/−] [%] • µPD942: [+/−] [√x] [PI] • µPD940: [+/−] [%] [√x] [PI] • µPD277: [+/−] [M=] [MR/C] [- K] [%] [√x] • µPD276: [+/−] [M+=] [M−=] [MRC] [MC] [MR] [- ∑] [- K] [%] [√x] • µPD946: [+/−] [M+=] [M−=] [MR] [MC] [ - ∑] [%] [1/x] [x2] [√x] [PI] |
The numbering scheme would suggest that the later µPD278 is based on either the µPD276 or µPD277 chips, but it is actually a design based on the µPD946.
QUICK-LINK to NEC Calculator Integrated Circuits.
| Type | Calculators | Keyboard | Constant (M-D-A-S) |
Digits | Fixed DP | Rounding | Special Functions |
Seg./Dig. Blanking |
(6,7,9) Font |
Seg. H | Entry Overflow |
Calculating Overflow |
| µPD276 | Elite Model 3002M, Homeland Model 810, Zayre Concept 24 | [+][−][=] | [ - K] 1-2-2-2 |
8 | Float | None | [+/−][M+=][M−=][MRC][MC][MR][
- ∑] [%][√x] |
NONE LB, TB |
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| Description | Comments | |
| Architecture | Single-chip Calculator | Second Generation |
| Category | Register Processor | Bit-serial |
| Related | µPD277 | First design |
| ROM Size | ||
| RAM Size | ||
| Outputs | 10 Digits 9 Segments |
VFD Digit Drivers VFD Segment Drivers |
| Inputs | 4 Keyboard 1 Clear |
Digit to Keyboard Scan-Matrix Active High |
Capacity: Up to 8 digits (positive and negative)
Logic: Algebraic Chain Logic with Constant
[2] [x] [3] [+] [4] [x] [5] [=] → '50.'
Number Entry: Right-justified number entry, entering a ninth digit is ignored
[1] [2] [3] [4] [5] [6] [7] [8] [9] → '12345678.'
Decimal Point: First entered decimal point is used, additional decimal point entries are ignored
[1] [.] [2] [.] [3] → '1.23'
Fixed Decimal Point: Fixed decimal point arithmetic is not supported
Decimal Alignment: Decimal alignment is not supported
[0] [.] [4] [5] [+] [0] [.] [5] [5] [=] → '1.'
Clear: Automatic power-up clear implemented. First press of the [C/CE] key clears last entry of a number, second press clears the calculator but the memory
Alternatively are separate [C] and [CE] keys implemented. [C] key clears the whole calculator, [CE] key clears last entry of a number
[1] [+] [2] [C/CE] [3] [=] → '4.'; [1] [+] [2] [C/CE] [C/CE] [3] [=] → '3.'
[1] [+] [2] [C] [3] [=] → '3.'; [1] [+] [2] [CE] [3] [=] → '4.'
Change Sign: The change sign function can be used in mid number entry but is ignored if pressing the [+/−] key before entering the number
[+/−] [2] [x] [3] [=] → '6.'; [2] [+/−] [x] [3] [=] → '-6.'
Number Display: Right-justified number display with leading-zero suppression
Negative Numbers: Negative numbers are shown with '-' in the leftmost position
Calculating Overflow: An overflow shows the result with the decimal point shifted 8 positions to the left and 'C' (or 'E' for negative numbers) in the leftmost position and is only recoverable using the [C] or [CE] keys
[1] [2] [3] [4] [5] [x] [1] [2] [3] [4] [5] [=] → 'C1.5239902'
Memory: 3/4-key memory with [M+=], [M−=] and [MRC] or [MR] and [MC] keys implemented. Memory store is indicated with '.' in the leftmost position
[MRC] [MRC] [3] [x] [2] [M+=] → '. 6.', [C] → '. 0.', [MRC] → '. 6.', [MRC] → '0.'
Auto-Summation: Auto-Summation can be enabled with an external switch and adds with each press of the [=] key the display result to the value already stored in the memory. Memory store is indicated with '.' in the leftmost position
[ - ∑] [- K] [MC] [3] [x] [2] [=] → '. 6.', [=] → '. 6.', [MR] → '. 12.'
Memory Overflow: A memory overflow keeps the stored value in place and is indicated with and 'C.' in the leftmost position. It is only recoverable using the [C] or [CE] keys
[MRC] [MRC] [99999998] [M−=] → '-.99999998.', [3] [M−=] → 'C. 0.', [C] → '. 0.', [MRC] → '-.99999998.'
Divide By Zero: A division of a positive or negative number by zero shows a '0' and 'C' in the leftmost position and is only recoverable using the [C] or [CE] keys
[1] [:] [0] [=] → 'C 0.'; [−] [1] [:] [0] [=] → 'C 0.'
Timeout: Not supported
Rounding: Rounding of displayed calculating results is not supported
[2] [0] [:] [3] [=] → '6.6666666'
Constant: Automatic constant can be enabled with an external switch and is implemented for multiplication (1st number used as constant), division (2nd), addition (2nd), and subtraction (2nd)
[- K] [3] [x] [2] [=] [=] → '6.', [1] [=] → '1.'; [4] [x] [=] [=] → '16.'
[- K] [3] [x] [2] [=] [=] → '18.', [1] [=] → '3.'; [4] [x] [=] [=] → '64.'
[- K] [3] [:] [2] [=] [=] → '0.75', [1] [=] → '0.5.'; [4] [:] [=] [=] → '0.25'
[- K] [3] [+] [2] [=] [=] → '7.', [1] [=] → '3.'; [4] [+] [=] [=] → '8.'
[- K] [3] [−] [2] [=] [=] → '1.', [1] [=] → '1.'; [4] [−] [=] [=] → '-8.'
Percent Function: The [%] key following the [x] key allows with the [+] and [−] keys mark-up and discount calculations. Using the [%] key is dividing the number by 100.
Using the [=] key following the [%] key in multiplication, division, addition and subtraction leads to unexpected results
[- K] [2] [0] [x] [5] [%] → '1.', [+] → '1.', [=] → '21.'
[- K] [2] [0] [x] [5] [%] → '1.', [−] → '1.', [=] → '19.'
[- K] [2] [0] [x] [5] [%] → '1.', [=] → '1.'
[- K] [2] [0] [x] [5] [%] → '1.', [=] → '20.'
[- K] [5] [:] [2] [0] [%] → '25.', [=] → '25.'
[- K] [5] [:] [2] [0] [%] → '25.', [=] → '125.'
[- K] [2] [0] [+] [5] [%] → '20.05', [=] → '20.05'
[- K] [2] [0] [+] [5] [%] → '20.05', [=] → '20.1'
[- K] [2] [0] [[−] [5] [%] → '19.95', [=] → '19.95'
[- K] [2] [0] [[−] [5] [%] → '19.95', [=] → '19.9'
Negative Square Root: Negative square roots are not allowed and result in an overflow condition indicated with an 'C' in the leftmost position and is only recoverable with the [C/CE] key
[8] [√x] → '2.8284271'; [8] [+/−] [√x] → 'C 0.'
Known Calculator Logic Bugs: None
ABSOLUTE MAXIMUM RATINGS
| Item | Min | Typ | Max | Unit | Comments |
| VDD | -15.0 | 0.3 | V | to VSS | |
| VGG | -15.0 | 0.3 | V | to VSS | |
| VOUT | -30.0 | 0.3 | V | VFD Output Voltage through 50 kOhm Resistors | |
| VIN (AC, K, CR) |
-15.0 | 0.3 | V | Input Voltage through 50 kOhm Resistors | |
| VIN (NK, FK1, FK2) |
-30.0 | 0.3 | V | Input Voltage through 50 kOhm Resistors |
RECOMMENDED OPERATING CONDITIONS
| Item | Min | Typ | Max | Unit | Comments |
| VSS | 0 | V | |||
| VDD | -6.6 | -6.0 | -5.4 | V | |
| VGG | -12.1 | -11.0 | -9.9 | V | |
| VOUT | -28 | 0 | V | VFD Output Voltage through 100 kOhm Resistors | |
| VIH (AC, K, CR) |
-1.5 | 0 | V | Input Voltage through 100 kOhm Resistors | |
| VIH (K, FK1, FK2) |
-3.6 | 0 | V | Input Voltage through 100 kOhm Resistors | |
| VIL (AC, K, CR) |
VGG | -9.0 | V | Input Voltage through 100 kOhm Resistors | |
| VIH (K, FK1, FK2) |
-28.0 | -9.0 | V | Input Voltage through 100 kOhm Resistors | |
| RCR | 390 | kOhm | CR to VGG | ||
| CCR | 82 | pF | CR to VSS |
ELECTRICAL CHARACTERISTICS
| Item | Min | Typ | Max | Unit | Comments |
| IDD | 2.3 | 4.4 | mA | CG = 82 pF, Segment- and | |
| IGG | 2.2 | 4.5 | mA | Digit-Driver Load 100 kOhm to VGG | |
| ION1 | -1.5 | mA | VOT = -1.0 V | ||
| ION2 | -3.0 | mA | VOT = -2.0 V | ||
| IOFF | -10 | uA | VOT = -28.0 V | ||
| IIH | +4.5 | uA | VIT = -1.5 V | ||
| IIL | -4.5 | uA | VIT = -9.0 V | ||
| FOSC | 24 | 41 | 47 | kHz | CG = 82 pF, |
CLOCK GENERATOR
The µPD276 single-chip calculator circuits includes an internal clock oscillator that can be enabled by connecting Pin 28 (CLK/CEXT) with a capacitor CEXT to VSS. Connecting Pin 28 directly to an external clock source overrides the internal clock oscillator and the chip can be operated with frequencies between 20 kHz and about 100 kHz. The external clock frequency should have a duty cycle close to 50% and oscillate between VSS and VDD.
The frequency of the internal clock oscillator is set with the external capacitor CEXT with a nominal value of 82 pF for a typical frequency of 40 kHz. Here at the Datamath Calculator Museum we operate the µPD276 Devices-under-Test (DUT) with an external 82 pF capacitor but verify its operation between 40 pF and 140 pF.
The operating frequency of the internal clock oscillator depends not only on the external capacitor, but its supply voltages VDD and VGG, too. We observed with our DUT a positive gradient of the oscillation frequency for VGG variations.
INTER-DIGIT BLANKING
The µPD276 single-chip calculator circuit is blanking its Digit Outputs briefly before and after the Segment Output change, while scanning the keyboard and display.
LEADING-ZERO SUPPRESSION
The µPD276 single-chip calculator circuit is storing in Digit D0 of the display register the position of the decimal point of the displayed number.
The Datamath Calculator Museum DCM-50A (PLAYGROUND) supports the Characterization of the µPD276 single-chip calculator circuits using the DCM-50A Playground DIL42 Adapter mounted on top of the DCM-50A PG Frame Carrier and the voltages VSS set to 6.0V and VDD/VGG set to -5.0V. Alternatively, the more flexible - but less comfortable - DCM-50A Playground BB400 Adapter can be used.
The µPD276 was manufactured in a 7.5 um metal gate PMOS process (metal width = 0.30 mil / 7.5 um, metal spacing = 0.30 mil / 7.5 um, diffusion width = 0.25 mil / 6.0 um, diffusion spacing = 0.35 mil / 9.0 um).
The µPD276 uses a standard 0.6” wide 28-pin DIP (Dual In-line Package with a 0.1” / 2.54 mm lead pitch).
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• VSS/VDD/VGG - Confirmed Pin Function from Die Photo • (VSS/VDD/VGG) - Pin Function from Calculator Schematics • N.C. - Confirmed Pin Function from Die Photo or Pin Measurement • (N.C.) - Pin Function from Calculator Schematics |
| Pin | IO | Function | Pin | IO | Function |
| 1 | I | Automatic Clear (high) | 28 | I | CLK/CEXT |
| 2 | I | Key-matrix input F | 27 | V | Negative Voltage VGG |
| 3 | I | Key-matrix input NK | 26 | V | Negative Voltage VDD |
| 4 | I | Key-matrix input FK1 | 25 | O | Segment driver H |
| 5 | I | Key-matrix input FK2 | 24 | O | Segment driver G |
| 6 | O | Digit driver 0 (DP Pos.) | 23 | O | Segment driver F |
| 7 | O | Digit driver 1 (LSD) | 22 | O | Segment driver E |
| 8 | O | Digit driver 2 | 21 | O | Segment driver D |
| 9 | O | Digit driver 3 | 20 | O | Segment driver C |
| 10 | O | Digit driver 4 | 19 | O | Segment driver B |
| 11 | O | Digit driver 5 | 18 | O | Segment driver A |
| 12 | O | Digit driver 6 | 17 | O | Segment driver DP |
| 13 | O | Digit driver 7 | 16 | O | Digit driver 9 (sign) |
| 14 | V | Common Voltage VSS | 15 | O | Digit driver D8 (MSD) |
| The Segment drivers A-H and DP (Decimal Point) are connected to the display in the pictured way. |  |
The keyboards of all calculators based on the µPD276 single-chip calculator circuit consist of an x/y-matrix connected to ten digit-driver outputs and the key-matrix inputs NK, FK1 and FK2. The [K] and [∑] functions are disabled with the digit-driver outputs D7 and D9, respectively connected with the key-matrix input F. Additional diodes are necessary when both functions are disabled.
Display scanning is performed in D0 → D9 direction at a rate of about 830 Hz:
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• State Time = 1 Clock =
0.025 ms @ CK=40 kHz • Digit Time = 4 States = 0.100 ms @ CK=40 kHz • Scan Time = 12 Digit Times (D0 to D9 with D10 and D11 a dead cycle) = 1.200 ms @ CK=40 kHz |
µPD276 | ||||
| NK | FK1 | FK2 | F | |
| D0 | 2 | = | C/CE | |
| D1 | 6 | + | CE | |
| D2 | 4 | − | ||
| D3 | 0 | % | ||
| D4 | 8 | M+= | M−= | |
| D5 | 9 | +/− | MR | |
| D6 | 1 | . | √x | |
| D7 | 5 | × | [ - K] | |
| D8 | 7 | ÷ | ||
| D9 | 3 | MRC | MC | [ - ∑] |
Calculators based on the µPD276 single-chip calculator circuits typically make use of 9-digit low-voltage VFDs (Vacuum Fluorescent Displays).
If you have additions to the above datasheet please email: joerg@datamath.org.
© Joerg Woerner, November 29, 2024. No reprints
without written permission.
