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DATAMATH CALCULATOR MUSEUM |
Texas Instruments announced on September 17, 1971 with the TMS1802NC the first available standard calculator building block on a single chip developed for a small desktop calculator. The chip integrates 3,520 Bits Read-Only program Memory (ROM, 320*11 Bits), a 182-bit Serial-Access Memory (SAM, 3 Registers * 13 digits, 2 * 13 Bit flags) and a decimal arithmetic logic unit as well as control, timing, and output decoders but no drivers for the display. These function blocks of the chip add up to an overall complexity of roughly 5,000 transistors.
The TMS1802NC single-chip calculator circuit was later renamed to TMS0102 and Texas Instruments sold millions and millions of TMS0100 chips to calculator manufacturers like Bowmar, Canon, Heathkit, Panasonic and Toshiba and dozens more while using them in their own calculators like TI-2500, TI-3000, and TI-3500, too.
One limitation of the compact 28-pin package of the TMS0100 family to enable its use with handheld calculators is the restriction to either 8-digit or 10-digit displays. Already experienced from various custom designs for Canon with partitioning the electronics of desktop calculators into multiple integrated circuits (ICs), Texas Instruments developed with the TMS0200 Building Blocks for Desktop Calculators a groundbreaking architecture centered around a Data Chip and various Support ICs. Texas Instruments filed on December 10, 1973 with Application Number 423,355 a patent application for an "External Register Memory Chip in a Calculator System" as a continuation of various patent applications tracing back to Summer 1972. Principle inventor Michael J. Cochran describes in the U.S. Patent #3,934,225 a fully featured electronic desktop calculators with a scalable architecture:
• TMS0200 Data Chip – Register Processor with four 16-digit Registers and seven Keyboard Scan inputs • TMS0300 ROM Chip – 512*13 Bits Instruction Memory with serial interface to Data Chip and 13-digit display and keyboard scanning, up to 4 ROM Chips • TMC0400 ROM/Register Chip - 512*13 Bits Instruction Memory with parallel interface to ROM Chip and two 16-digit Registers • TMS0xxx 10-Register Chip – Ten 16-digit Registers, up to 16 Register Chips • TMS0220 Printer Chip – Interface to two-color Drum Printer Mechanism |
The minimum configuration of a calculator using the TMS0200 Building Blocks consists of a TMS0200 Data Chip, a TMS0300 ROM Chip, decoder and drivers for the display, a complex 2-Phase clock generator and obviously keyboard, display, power supply and housing.
Comparing the schematics and specifications of both a TI-3500 based on the TMS0100 single-chip calculator circuit and a TI-4000 using a TMS0200/TMS0300 chip-set, reveals some significant differences:
Product | # of Digits | Functions | ROM | RAM | Calculator Brain |
Segment Decoder |
Display Drivers |
Clock Generation |
Misc. |
TI-3500 | 10 | [+=] [-=] [*] [:] [CONST/CHAIN] [DP SELECTION] |
320*11 Bits | 3*13 digits | TMS0106 | - | 10 discrete Transistors |
1 TTL IC | - |
TI-4000 | 12 | [+=] [-=] [*] [:] [%] [MEMORY] [CONST/CHAIN] [DP SELECTION] |
512*13 Bits | 4*16 digits | TMS0201 TMC0301 |
1 TTL IC | 24 discrete Transistors |
4 TTL IC | Keyboard Interface 7 discrete Transistors |
Although minimum chip count for a small
Desktop Calculator is obviously not a strength of the TMS0200 Building Blocks, did the architecture excel in its scalability:
Product | Function | Data Chip | ROM Chip | ROM/Register Chip | Printer Chip |
TI-4000 | Small Desktop Calculator | TMS0201 | TMS0301 | ||
SR-20 | Desktop Scientific Calculator | TMS0202 | TMS0304 | ||
TI-450 | Desktop Calculator | TMS0203 | TMC0322 | ||
TI-500 | Printing Desktop Calculator | TMS0203 | TMC0305 | TMS0221 | |
TI-620 | Printing Desktop Calculator | TMS0203 | TMC0306 | TMC0406 | TMS0221 |
SR-22 | Desktop Hexadecimal Calculator | TMS0207 | TMC0323 | TMC0404 |
While none of the known products based on the TMS0200 Building Blocks makes fully use of their possibilities like addressing up to 4 ROM chips and up to 16 Register Chips, did the design lay out the architecture of the
TMC0500 Building Blocks for Scientific and Programmable Calculators introduced with the
"Slide Rule" calculator SR-50 in January 1974 and leading all the way to the legendary
TI Programmable 59 and the amazing
SR-60A Prompting Desktop calculator.
The TMC0500 Building Blocks were clearly designed with portable calculators in mind and optimized the necessary real estate of the "calculator brain" dramatically:
• TMS0200 - Minimum configuration: 40-pin Data Chip + 40-pin ROM Chip + 16-pin Segment Decoder, optional ROM Expansion with 40-pin ROM/Register Chip • TMC0500 - Minimum configuration: 28-pin Arithmetic Chip + 28-pin Scanning ROM Chip, optional ROM Expansion with piggy-backing a second Scanning ROM Chip and/or additional 8-pin Bare ROM Chips |
The similarity between the TMC0500 and TMS0200 architecture allowed even the introduction of additional TMC02xx devices used with products based on the TMC0500 Building Blocks for Scientific and Programmable calculators:
• TMC0250 Printer/Display Chip – Interface to Thermal Printer Mechanism and Dot-Matrix Display |
One pin labeled "PFS" selects on these Chips for Thermal Printers and Dot-Matrix Displays how the 13-bit Instruction Word is provided from the ROM:
• TMS0200 Mode (n.c.): IRG A Input for B0 – B5 and IRG B Input for B6 – B12 • TMC0500 Mode: (VDD): IRG B Input for B0 – B12 |
Communication between the TMS0200 Data Chip and the other family members of the TMS0200 Building Blocks is realized with multiple means:
• 4 S-Times Outputs SA, SB, SC, and SD to signal the 16 States of the Instruction Cycle and synchronize Digit Scanning between the TMS0300 ROM Chip (11 digits D2 – D12) and TMS0200 Data Chip (4 digits D1, D13 – D15) • IRG A and IRG B Inputs to receive the 13-bit Instruction Words from the TMC0300 ROM in two chunks of 6 bits (IRG A B0 – B5) and 7 bits (IRG B B6 – B12) • 4-bit bidirectional I/O Bus I/O 8, I/O 4, I/O 2, and I/O 1 to communicate with 10-Register Chips or the two 16-digit Registers of the TMC0400 ROM/Register Chips. Note: The ROM section of the TMC0400 is fed through its 13-bit parallel connection with the TMC0300 to the TMS0200 • Various Condition and Flag Outputs to signal certain states of operations to its peripherals • BUSY Input for slow devices like the Printer Chip |
The combination of both its programmability and scalability of the TMS0200 Building Blocks for Desktop Calculators allowed the introduction of some interesting products like the Hexadecimal Calculator/Converter SR-22 bypassing the BCD correction of the ALU (Arithmetic Logic Unit) or the massive Printing Desktop calculator TI-620.
Only certain Desktop and Scientific Calculators introduced between 1973 and 1974 by Texas Instruments, Canon, Olympia and Teal adopted the TMS0200 Architecture, while TMC0250 Printer/Display Chip found its way into the wildly successful PC-100 Printer Cradle for the SR-51, SR-52, SR-56, TI-58, TI-58C, and TI-59 calculators and the SR-60 Prompting Calculator.
Device | Description | Comments |
TMS0200 | Data Chip | Register Processor with four 16-digit Registers and seven Keyboard Scan inputs |
TMS0220 | Printer Chip | Interface to two-color Drum Printer Mechanism |
TMC0250 | Printer/Display Chip | Interface to Thermal Printer Mechanism and Dot-Matrix Display |
TMS0300 | ROM Chip | 512*13 Bits Instruction Memory with serial interface to Data Chip and 13-digit display and keyboard scanning, up to 4 ROM Chips |
TMC0400 | ROM/Register Chip | 512*13 Bits Instruction Memory with parallel interface to ROM Chip and two 16-digit Registers |
Description | Comments | |
Architecture | Building Blocks | |
Category | Register Processor | 64-bit registers (16 digits * 4 Bits) |
ROM Size | 512 * 13 Bits to 1k *13 Bits | TI-4000 to TI-620 |
Register Size | 256 Bits to 384 Bits | 4 to 6 Registers * 64 Bits |
Parameter | Min | Typ | Max | Unit | Comments |
VSS | 0 | V | |||
VDD | -10.5 | -10.0 | -9.5 | V | |
VGG | -16.3 | -15.8 | -15.3 | V | |
PHI1, PHI2 | 225 | 230 | kHz | Opposite phases |
If you have additions to the above datasheet please email: joerg@datamath.org.
© Joerg Woerner, March 4, 2021. No reprints
without written permission.