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Texas Instruments TMC0599

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Features

With the TMC05xx building blocks Texas Instruments created a novel architecture for scalable scientific calculators. The architecture uses minimum a 2 chip design with the Arithmetic chip TMC0501 and the SCOM (scanning read only memory) but was expandable to a maximum of 8 SCOM's, additional RAM as program memory for programmable calculators, additional RAM for general purpose registers and even a chip driving a printer. Most scientific and programmable calculators from Texas Instruments between the years 1974 and 1982 (SR-50..TI-59) use these chips.

The up to thirteen TMC0599 MULTI-REGISTER chips provide user program storage and user memory storage in the SR-52, SR-56 and SR-60(A). Each chip contains 1920 bits of read/write memory holding either 240 program steps or 30 data registers.

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Usage

SR-52, SR-56, SR-60, SR-60A

Calculator Program steps Data memory TMC0599
SR-52 224 20 2
SR-56 100 10 1
SR-60 480 40 5
SR-60A 1920 100 13
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Technical Specification

Item Min Typ Max Unit Comments
VSS   0   V  
VDD -10.5 -10.0 -9.5 V  
VGG -16.3 -15.8 -15.3 V  
PHI1, PHI2   225 230 kHz Opposite phases
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Housing

The TMC0599 uses a standard DIP-16 package.

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Pin Description

 

Pin IO Function Pin IO Function
1 V Negative Voltage VDD 16 I External access
2 I Calculating status 15 I not connected
3 I Clock Input 1 14 I not connected
4 I Clock Input 2 13 O Instruction words
5 IO SCOM Interface D0 12 I Bank-Select 1 (VSS,nc)
6 IO SCOM Interface D1 11 I Bank-Select 0 (VSS,nc)
7 IO SCOM Interface D2 10 IO SCOM Interface D3
8 V Common Voltage 9 V Negative Voltage VDD

 

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If you have additions to the above datasheet please email: joerg@datamath.org.

Joerg Woerner, February 02, 2001. No reprints without written permission.