DATAMATH CALCULATOR MUSEUM
Texas Instruments introduced on May 24, 1977 the now legendary TI Programmable 59 and its sibling TI-58, featuring a novelty, the Solid State Software Modules with up to 5,000 program steps. A small lid on the backside of the TI-58/TI-59 allowed for easy access to the modules roughly the size of thumb tip.
The Master Library, known as "Module -1-", with 25 different programs was included with the TI-58 and TI-59. Twelve additional Solid State Software Modules, known as "Module -2- to -13-" were available from Texas Instruments as Standard Libraries. Due to this innovative module concept both the TI-58 and TI-59 gained a lot of attention and dozens of Modules were released for applications ranging from insurance fee calculations to tax calculations to screw joint calculations, HVAC design, pool water analysis and even flight computers for the USMC Harrier.
Each of these Modules contains a Mask-ROM (Read-Only Memory programmed during the manufacturing process) in a small 8-pin package connected serially to the TMC0500 Building Blocks for Scientific and Programmable Calculators used with the TI-58/TI-59 and introduced already in 1974 with the SR-50 calculator. While the 13-Bit instructions for the TMC0501 Arithmetic Chip are stored in SCOM (Scanning and 1k*13 Bits Read-Only Memory), DSCOM (SCOM with 2.5k*13 Bits ROM), or BROM (Bare ROM with 1k*13 Bits, no scanning) Chips, are user programs stored as OP-Codes or "merged keystrokes" encoded in two BCD (Binary Coded Decimal) digits for a combined 8-bit data size. Storing user data is accomplished by concatenating eight program steps into one data register. Keystroke programmable calculators based on the TMC0500 Architecture like the SR-52 and SR-56 store user programs and user data in PRAM (Program Random-Access Memory) Chips with a capacity of 1,920 Bits or 240 program steps/30 data registers accessed through a 4-bit I/O bus. Calculators with an integrated reader for magnetic cards allow loading and archiving of user programs and user data accordingly.
While the pin-out of the TMC0540 PROM (Program Read-Only Memory) is identical with the TMC0560 BROM (Bare Read-Only Memory), are their architectures completely different:
TMC0540: 5,000*8 Bits capacity, 4-digit BCD address (0000-4999), two BCD digits Op-Codes
TMC0560: 1,024*13 Bits capacity, 10-bit Binary address (0x000-0x3FF), 13-bit Instruction Words
Accessing the TMC0540 PROM is established with four different commands:
LOAD PC: Sets memory address pointer to 4-digits BCD value, LSD first with 0000 to 9994
FETCH: Reads 2 two BCD digits and increments address by 1, lower nibble first
FETCH HIGH: Reads upper BCD digit and does not increment address
UNLOAD PC: Reads current memory address pointer as 4-digits BCD value, LSD first
The Master Library or "Module -1-" provided with the TI-58/TI-58C/TI-59 calculators uses a TMC0540 Chip with the marking TMC0541, "Module -2-" is marked TMC0542 and so on. Modules manufactured for third parties are marked with TMC0540 and a ROM-Code identification "ZA55xx" and later adopted to the TI-Standard for Consumer Group Products with a leading "CD56xx" or "CD57XX".
QUICK-LINK to TMS0500 Family.
TI-58, TI-58C, TI-59
|PHI1, PHI2||225||230||kHz||Opposite phases|
The TMC0540 was manufactured in a 6 um metal gate PMOS process (metal width = 0.25 mil / 6.0 um, metal spacing = 0.25 mil / 6.0 um, diffusion width = 0.20 mil / 5.0 um, diffusion spacing = 0.30 mil / 8.0 um).
The TMC0540 uses a standard 0.3 wide 8-pin DIP (Dual In-line Package with a 0.1 / 2.54 mm lead pitch).
|1||V||Negative Voltage VGG||8||V||Common Voltage|
|2||V||Negative Voltage VDD||7||I||Clock Input 1|
|3||O||Instruction words||6||I||Clock Input 2|
|4||I||Calculating status||5||I||External access|
If you have additions to the above datasheet please email: email@example.com.
© Joerg Woerner, February 02, 2001. No reprints
without written permission.