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With the introduction of the SR-51-II in 1976 the original 28-pin DIP (Dual Inline Package) encapsulation used for the TMC0501 Arithmetic Chip was changed to a 28-pin SDIP (Shrink Dual Inline Package) roughly the size of a standard 20-pin DIP encapsulation and the TMC0580 DSCOM (Double Scanning and Read-Only Memory) Chip more than doubled the capacity of the larger TMC0520/TMC0530 SCOM Chips from 1k*13 Bits to 2.5k*13 Bits in a 28-pin SDIP housing paving the way for the TI Programmable 59.

The TMC0580 DSCOM Chip integrates 2.5k*13 Bits Instruction Memory with serial interface to the TMC0501E Enhanced Arithmetic Chip, 32 Constants mainly used for the calculation of transcendental functions with 16 digits, each accessible through a 4-bit bidirectional I/O bus and outputs for up to 16-digit display and keyboard scanning. In addition to the 5 Registers of the TMC0501E Enhanced Arithmetic Chip labeled A, B, C, D, and E integrates the SCOM Chip two additional Registers with 16 digits capacity each, and named accordingly Register F and Register G. The DSCOM Chip not only doubled the number of additional Registers but increased them from two to eight. An additional improvement of the TMC0580 DSCOM Chip carried over from the TMC0530 is an additional integrated two-phase clock generator that can be used as a bond-out option in a 30-pin DIP (Dual Inline Package) encapsulation or in a standard 28-pin DIP housing as used with the SR-51-II.

While the design of the TMC0580 DSCOM Chip would allow the use of multiple devices in one product, were most designs implemented with two TMC0580 and additional TMC0560 BROM Chips to increase program memory to the maximum addressable capacity of 8k*13 Bits. Only the SR-60A Prompting Desktop Calculator makes use of three DSCOM Chips..

Communication between the TMC0501E Enhanced Arithmetic Chip and the other family members of the TMC0500 Building Blocks for Scientific and Programmable Calculators is realized with multiple means:

• IDLE, PHI 1 and PHI 2 Signals are used to synchronize all peripherals connected to the TMC0501E Enhanced Arithmetic Chip with the 16 States of its Instruction Cycle • EXT Output indicates that the TMC0501E Enhanced Arithmetic Chip is addressing external memories/registers • IRG Input to receive the 13-bit Instruction Words from the ROM of the TMC0580 • 4-bit bidirectional I/O Bus I/O 8, I/O 4, I/O 2, and I/O 1 to communicate with registers

QUICK-LINK to TMS0500 Family.

Type	Calculators	Function
TMC0581	SR-51 II	DSCOM
TMC0582	TI-58, TI-59	DSCOM 1, with TMC0571
TMC0583	TI-58, TI-59	DSCOM 2, with TMC0571
TMC0584	SR-60A	DSCOM 1
TMC0585	SR-60A	DSCOM 2
TMC0586	SR-60A	DSCOM 3
TMC0587	TI-5230	DSCOM 1, with TMC0572
TMC0588	TI-5230	DSCOM 2, with TMC0572
TMC0580/CD2400	TI-58C	DSCOM 1, with TMC0573
TMC0580/CD2401	TI-58C	DSCOM 2, with TMC0573

Revision	Products	First Prototypes	Comments
TMC0581	SR-51-C (SR-51 II)		Initial design
TMC0581 Rev A	SR-51-C (SR-51 II)	May 1976	6 [:] 0 [=] [SUM] → [INV] [SUM]
TMC0581 Rev B	SR-51-C (SR-51 II)	August 1976
TMC0582	SR-52 II (TI-59)	December 1976	Initial design, DSCOM 1
TMC0582 Rev A TMC0523 Rev A	SR-52 II (TI-59)	January 1977	Card protecting, etc.
TMC0582 Rev B TMC0523 Rev A	SR-52 II (TI-59)	March 1977
TMC0583	SR-52 II (TI-59)	December 1976	Initial design, DSCOM 2
TMC0583 Rev A TMC0523 Rev A	SR-52 II (TI-59)	January 1977	Card protecting, etc.
TMC0583 Rev B TMC0523 Rev A	SR-52 II (TI-59)	March 1977
TMC0584	SR-60A	May 1977	Initial design, DSCOM 1
TMC0584 Rev A TMC0523 Rev A	SR-60A	July 1977	Card protecting, etc.
TMC0585	SR-60A	May 1977	Initial design, DSCOM 2
TMC0586	SR-60A	May 1977	Initial design, DSCOM 3

Item	Min	Typ	Max	Unit	Comments
VSS		0		V
VDD	-10.5	-10.0	-9.5	V
VGG	-16.3	-15.8	-15.3	V
PHI1, PHI2		225	230	kHz	Opposite phases

Pin	IO	Function	Pin	IO	Function
1	O	Digit driver 15	28	O	Digit driver 14
2	V	Negative Voltage VGG	27	O	Digit driver 13 (OVER)
3	V	Negative Voltage VDD	26	O	Digit driver 12 (M-MSD)
4	IO	SCOM Interface D0	25	O	Digit driver 11
5	IO	SCOM Interface D1	24	O	Digit driver 10
6	IO	SCOM Interface D2	23	O	Digit driver 9
7	IO	SCOM Interface D3	22	O	Digit driver 8
8	O	Instruction words	21	O	Digit driver 7
9	I	Calculating status	20	O	Digit driver 6
10	I	External access	19	O	Digit driver 5
11	I	Clock Input 2	18	O	Digit driver 4
12	I	Clock Input 1	17	O	Digit driver 3 (M-LSD)
13	V	Common Voltage	16	O	Digit driver 2 (E-MSD)
14	XO	Oscillator/Digit driver 0	15	O	Digit driver 1 (E-LSD)

The keyboards of all calculators based on the TMC0501 Arithmetic chip consist of a x/y-matrix connected to the SCOM digit driver outputs and the TMC0501 keymatrix inputs,

Example for TI-58 and TI-59: 

	KN	KO	KP	KQ	KR	KS	KT
D0	(?)		(?)
D1		A	B	C		D	E
D2		2nd	INV	lnx		CE	CLR
D3		LRN	x<>t	x2		√x	1/x
D4		SST	STO	RCL		SUM	yX
D5		BST	EE	(		)	÷
D6		GTO	7	8		9	×
D7		SBR	4	5	TI58!	6	−
D8		RST	1	2		3	+
D9		R/S	0	.		+/−	=
D10					Card Sense
D11
D12	(?)		(?)
D13
D14
D15	(?)		(?)

Comments: The TI-58 is identified by a diode between D7 - KR, the TI-59 detects the Card Sense switch between D10 - KR. The (?) nodes are used to detect PRINT, PAPER ADVANCE and TRACE on the PC-100A.

If you have additions to the above datasheet please email: joerg@datamath.org.

© Joerg Woerner, February 02, 2001. No reprints without written permission.