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Texas Instruments TMC0530 SCOM (Scanning and Read-Only Memory) Chip

• Features

Texas Instruments introduced on January 15, 1974 with the SR-50 their first "Slide Rule" calculator adding trigonometric and hyperbolic functions to the feature set of the SR-10, SR-11, and SR-16 line of calculators to compete with Hewlett Packard’s HP-35. The SR-50 was the first product based on the TMC0500 Building Blocks for Scientific and Programmable Calculators and used its minimum configuration combining the TMC0501 Arithmetic Chip and one TMC0521 SCOM (Scanning Read-Only Memory) Chip with the necessary display drivers for its 14-digit LED display, power supply and clock generation. Later Scientific Calculators made use of the flexibility of the TMC0500 architecture by using multiple SCOMs (SR-51), adding program and data memory (SR-56) and even magnetic card readers (SR-52) and a printer and matrix display (SR-60).

The TMC0530 SCOM Chip integrates like its predecessor TMC0520 SCOM Chip 1,024*13 Bits Instruction Memory with serial interface to the TMC0501E Enhanced Arithmetic Chip, 16 Constants mainly used for the calculation of transcendental functions with 16 digits, each accessible through a 4-bit bidirectional I/O bus and outputs for 16-digit display scanning. In addition to the 5 Registers of the TMC0501E Arithmetic Chip labeled A, B, C, D, and E integrates the SCOM Chip two additional Registers with 16 digits capacity each, and named accordingly Register F and Register G. Major improvement of the TMC0530 SCOM Chip is an additional integrated two-phase clock generator that can be used as a bond-out option in a 30-pin DIP (Dual Inline Package) encapsulation with an external mechanical resonator made of high-stability piezoelectric lead zirconate titanate (PZT) as used with the SR-52A or with reduced frequency stability in a standard 28-pin DIP housing as used with all other designs. While the design of the TMC0530 SCOM Chip would allow to use up to 8 devices in one product, were most designs implemented with additional TMC0560 BROM (Bare Read-Only Memory) Chips to increase program memory capacity.

Communication between the TMC0501E Enhanced Arithmetic Chip and the other family members of the TMC0500 Building Blocks is realized with multiple means:

• IDLE, CLK 1 and CLK 2 Outputs are used to synchronize all peripherals connected to the TMC0501E Enhanced Arithmetic Chip with the 16 States of its Instruction Cycle
• EXT Output indicates that the TMC0501E Enhanced Arithmetic Chip is addressing external memories/registers
• IRG Input to receive the 13-bit Instruction Words from the ROM of the TMC0530
• 4-bit bidirectional I/O Bus I/O 8, I/O 4, I/O 2, and I/O 1 to communicate with registers

The TMC0530 SCOM Chip was replaced in Summer 1976 with the TMC0580 DSCOM (Double Scanning and Read-Only Memory) Chip boosting the program capacity from 1,024*13 Bits to 2.5k*13 Bits.

QUICK-LINK to TMS0500 Family.

• Family Members and Applications

Type Calculator Function
TMC0531 SR-50A SCOM 1
TMC0532 SR-51A SCOM 1
TMC0533 SR-51A SCOM 2
TMC0534 SR-52A SCOM 1, with TMC0562, TMC0563
TMC0536 SR-60 SCOM 1, with TMC0564, TMC0565, TMC0566, TMC0567, TMC0568/TMC0570
TMC0537 SR-56 SCOM 1
TMC0538 SR-56 SCOM 2

• Revisions

Revision Products First Prototypes Comments
TMC0531 SR-50A (March 1975) Initial design, SCOM 1
TMC0530 Base Mask rework
TMC0531 Rev A SR-50A December 1975  
TMC0532 SR-51A May 1975 Initial design, SCOM 1
Cos-1 hangup at -1
TMC0530 Base Mask rework
TMC0532 Rev A SR-51A November 1975  
TMC0533 SR-51A May 1975 Initial design, SCOM 2
Print Fix
TMC0530 Base Mask rework
TMC0533 Rev A SR-51A November 1975  
TMC0534 SR-52 December 1975 Initial design, SCOM 1
⅓ - ⅓ = 0 Fix
TMC0534 Rev A SR-52   [%] [=] [CE] 2 [SUM] 02 [RCL] 02 → -2
Stopped for TMC0534 Rev B
TMC0534 Rev B SR-52 August 1975  
TMC0536 SR-60    
TMC0537 SR-51P (SR-56) December 1975 Initial design, SCOM 1
a ± 0b → a*1012 Fix
⅓ - ⅓ = 0 Fix, EE Goto
TMC0537 Rev A SR-51P (SR-56) March 1976 [%] [=] [CE] 2 [SUM] 02 [RCL] 02 → -2
Stopped for TMC0534 Rev B
TMC0538 SR-51P (SR-56) December 1975 Initial design, SCOM 2

• Technical Specifications

Item Min Typ Max Unit Comments
VSS   0   V  
VDD -10.5 -10.0 -9.5 V  
VGG -16.3 -15.8 -15.3 V  
PHI1, PHI2   225 230 kHz Opposite phases

• Technology

The TMC0530 was manufactured in a 8 um metal gate PMOS process (metal width = 0.3 mil / 8.0 um, metal spacing = 0.35 mil / 9.0 um, diffusion width = 0.25 mil / 6.0 um, diffusion spacing = 0.35 mil / 9.0 um).

• Packaging

The TMC0531, TMC0532, TMC0533, TMC0537, and TMC0538 use a standard 0.6” wide 28-pin DIP (Dual In-line Package with a 0.1” / 2.54 mm lead pitch).
The TMC0534 uses an unusual 0.6” wide 30-pin DIP (Dual In-line Package with a 0.1” / 2.54 mm lead pitch).

• Pin Configuration 28-pin DIP

Pin IO Function Pin IO Function
1 O Digit driver 14 28 O Digit driver 14
2 V Negative Voltage VGG 27 O Digit driver 13 (OVER)
3 V Negative Voltage VDD 26 O Digit driver 12 (E-MSD)
4 IO SCOM Interface D0 25 O Digit driver 11
5 IO SCOM Interface D1 24 O Digit driver 10
6 IO SCOM Interface D2 23 O Digit driver 9
7 IO SCOM Interface D3 22 O Digit driver 8
8 O Instruction words 21 O Digit driver 7
9 I Calculating status 20 O Digit driver 6
10 I External access 19 O Digit driver 5
11 I Clock Input 2 18 O Digit driver 4
12 I Clock Input 1 17 O Digit driver 3 (M-LSD)
13 V Common Voltage 16 O Digit driver 2 (E-MSD)
14 O Digit driver 0 15 O Digit driver 1 (E-LSD)


• Pin Configuration 30-pin DIP

Pin IO Function Pin IO Function
1 O Digit driver 14 30 O Digit driver 14
2 V Negative Voltage VGG 29 O Digit driver 13 (OVER)
3 V Negative Voltage VDD 28 O Digit driver 12 (E-MSD)
4 IO SCOM Interface D0 27 O Digit driver 11
5 IO SCOM Interface D1 26 O Digit driver 10
6 IO SCOM Interface D2 25 O Digit driver 9
7 IO SCOM Interface D3 24 O Digit driver 8
8 O Instruction words 23 O Digit driver 7
9 I Calculating status 22 O Digit driver 6
10 I External access 21 O Digit driver 5
11 I Clock Input 2 20 O Digit driver 4
12 I Clock Input 1 19 O Digit driver 3 (M-LSD)
13 V Common Voltage 18 O Digit driver 2 (E-MSD)
14 X XTAL 17 O Digit driver 1 (E-LSD)
15 O Digit driver 0 16 - Not connected


• Keyboard Scan-Matrix

The keyboards of all calculators based on the TMC0501 Arithmetic chip consist of a x/y-matrix connected to the SCOM digit driver outputs and the TMC0501 keymatrix inputs.

Example for the SR-50A: 

  KN KO KP KQ KR KS KT
D0              
D1 1 = C log   eX SUM
D2 2 - hyp        
D3 3 + . X2   D/R  
D4 4   arc     lnX  
D5 5            
D6 6 : CE 1/X   cos STO
D7 7 * +/-     sin pi
D8 8           RCL
D9 9           X#Y
D10 0 XsqrY          
D11   XY          
D12       sqrX      
D13     EE X!   tan  

Comments: The R-D switch is detected with a diode between D14 - KT.

Example for the SR-52: 

  KN KO KP KQ KR KS KT
D0              
D1 1 A B C   D E
D2 2 2nd INV lnX   CE CLR
D3 3 LRN sin cos   tan XsqrY
D4 4 GTO STO RCL   SUM YX
D5 5 SBR EE (   ) :
D6 6 INS         *
D7 7 SST         -
D8 8 HLT         +
D9 9 RUN   .   +/- =
D10 0            
D11              
D12              
D13              

Comments: The R-D switch is detected with a diode between D14 - KT.

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If you have additions to the above datasheet please email: joerg@datamath.org.

© Joerg Woerner, December 28, 2020. No reprints without written permission.