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Texas Instruments announced on September 16, 1975 with the SR-52 their first Keystroke Programmable Handheld Calculator based on the TMS0500 Building Blocks for Scientific and Programmable Calculators introduced already in January 1974 with the SR-50 “Slide Rule” calculator. While the SR-50 used only the minimum configuration of this groundbreaking architecture combining the TMC0501 Arithmetic Chip and one TMC0521 SCOM (Scanning Read-Only Memory) Chip with the necessary display drivers for its 14-digit LED display plus power supply and clock generation, went the SR-52 a step ahead and made full use of the TMS0500 Building Blocks. The TI Programmable 59 – nicknamed SR-52 II - was introduced in May 1977 as successor of the SR-52 and perfectly applied Moore’s Law integrating more memory capacity in smaller packages while lowering complexity. A closer look at the PCB (printed circuit board) of the TI-59 reveals a total of nine PMOS (P-channel Metal–oxide Semiconductor) chips:

• TMC0501E: Enhanced Arithmetic Chip – Register Processor with five 16-digit Registers and segment decoder/driver • TMC0582, TMC0583: TMC0580 Double Scanning and Read-Only Memory Chip – 2.5k*13 Bits Instruction Memory with serial interface to Arithmetic Chip, 32 Constants with 16 digits, eight 16-digit Registers and 16-digit display scanning, each • TMC0571: TMC0560 Bare Read-Only Memory Chips – 1k*13 Bits Instruction Memory with serial interface to Arithmetic Chip for a combined 6k*13 Bits Instruction Memory • TMC0594: Magnetic I/O Chip – Four channel interface for magnetic card reader to save and load programs with up to 480 steps • TMC0598*4: Four Multi-Register Chips – 240*8 Bits Random Access Memory with 4-bit I/O Bus to Arithmetic Chip, stores 240 program steps or 30 numbers of 16 digits, each

Texas Instruments introduced together with the calculator a matching "Printer Cradle" PC-100A with an integrated alphanumerical printer capable to print up to 20 characters per line at a speed of three lines per second on a 2.5 inch wide thermal paper. The TI-59 calculator connects to the PC-100A printer cradle with a 12-pin connector accessible through its battery compartment and featuring all TMC0501E signals necessary to communicate to an additional PMOS chip hosted on the PC-100A PCB:

• TMC0251: TMC0250 Printer/Display Chip – Interface to Thermal Printer Mechanism

(Note: The two TMC0561/TMC0569 Bare Read-Only Memories on the PC-100A PCB are not used with the TI-59, they provide compatibility with the SR-52 and SR-56 and were dropped with the later PC-100C.)

The SR-60A Prompting Desktop calculator introduced in 1977, too took the architecture of the TI-59 even a step further and integrated an alphanumeric display and keyboard with even more Instruction and Data/program memory into a large but elegant housing.

The TMC0594 Magnetic I/O Chip provides the interface between the four-track magnetic card read/write mechanism and the TMC0501E Enhanced Arithmetic Chip. Communication between the two chips is realized with multiple means:

• IDLE, PHI 1 and PHI 2 Signals are used to synchronize all peripherals connected to the TMC501E Enhanced Arithmetic Chip with the 16 States of its Instruction Cycle • EXT Output indicates that the TMC501E Enhanced Arithmetic Chip is addressing external memories/registers • IRG Input to receive the 13-bit Instruction Words from the Instruction Memory

The TMC0594 Magnetic I/O Chip also conditions the signals to and from the magnetic card read/write mechanism (e.g. motor, card sensor input, channel 1-4) to make them compatible with PMOS logic levels.

The card speed of the TI-59 is set at 2.3 IPS (inches per second), the calculator will function at a card speed of 2.0 IPS to 2.5 IPS. At any speed below 2.0 IPS, the magnetic head can’t generate the required voltage for reliable reading. At any speed above 2.5 IPS, the write length exceeds the usable length of the card.

QUICK-LINK to TMS0500 Family.

Revision	Products	First Prototypes	Comments
TMC0594	SR-52 II (TI-59)	October 1976	Initial design Formerly TMC0595 Rev E

Item	Min	Typ	Max	Unit	Comments
VSS		0		V
VB	-4.3	-3.75	-3.3	V
VDD	-10.5	-10.0	-9.5	V
VGG	-16.3	-15.8	-15.3	V
PHI1, PHI2		225	230	kHz	Opposite phases

Pin	IO	Function	Pin	IO	Function
1	A	Write Track 2	22	A	Write Track 3
2	A	Read Track 2	21	A	Read Track 3
3	A	Write Track 1	20	A	Write Track 4
4	A	Read Track 1	A9	I	Read Track 4
5	V	Common Voltage	18	V	Reference Voltage
6	O	Instruction words	17	V	Common Voltage
7	I	Calculating status	16	I	External access
8	O	Keyboard emulation	15	I	Clock Input 2
9	O	Motor on/off	14	I	Clock Input 1
10	I	Card Sensing Input	13	V	Negative Voltage VDD
11	O	Lamp (not connected)	12	V	Negative Voltage VGG

If you have additions to the above datasheet please email: joerg@datamath.org.

© Joerg Woerner, February 02, 2001. No reprints without written permission.